1. Field of the Invention
This invention relates in general to a buffer memory connected between two devices having mutually different operating speeds, and, more particularly, to a buffer memory for absorbing the difference in the operating speeds, and an operating method therefor. This invention has particular applicability to a digital audio tape recorder memory that may be used as an auxiliary storage device for computers.
2. Description of the Background Art
In a recording reproducing apparatus for high density recording of digital signals on a magnetic recording medium, such as a digital audio tape recorder employing a rotary head, referred to hereinafter as DAT, there are recorded data simultaneously with annexed error correction codes. In case of a partial data failure or dropout in the course of data reproduction, the correction operation is performed on the basis of the error correction codes to reproduce the recorded data. This function is generally widely known as the error correction function.
The above described rotary head type DAT is used as the acoustic signal recording/reproducing apparatus per se, wherein the input acoustic signals are recorded after they are previously modulated into pulse code signals. In the recording operation, the rate of occurrence of the data modulated into the pulse codes is designed to be equal to the rate of recording thereof on the recording medium, so that no buffer memory is required for adjusting the operating speed.
However, when the recording/reproducing apparatus is used for example as the auxiliary storage for a computer, since the recording and reproducing speeds of the recording/reproducing apparatus are fixed in advance, these speeds are generally different from the operating speed of the computer, that is, the transfer rate of data inputted to or outputted from the computer. As a result, it becomes necessary to use other measures for absorbing the difference in the operating speeds.
As one of those measures, for example, for the case in which the data transfer rate of the computer is lower than the recording speed of the recording/reproducing apparatus, there is known a method consisting in apparently matching the operating speeds by writing the data inputted from the computer in the recording/reproducing apparatus in duplicate on the recording medium.
In this method, however, the recording density is necessarily lowered.
As other measures, it is known to perform the recording operation on the recording medium intermittently for absorbing the difference in the operating speeds. This method , however, is not practical in a DAT employing a rotary head in that, when the data are sequentially recorded on the recording medium by the intermittent recording operation, the feed mechanism for the recording medium is necessarily complicated.
Thus, for making use of the recording/reproducing apparatus as the auxiliary storage for a computer, it is also known to provide a buffer memory between the computer and the recording/reproducing apparatus to absorb the difference in the operating speeds of the recording/reproducing apparatus and the computer by the buffer memory.
However, in this case, when the data applied from, for example, the computer, is transferred to the recording/reproducing apparatus, this data is written in its entirety into the buffer memory, so that it is necessary to increase the storage capacity of the buffer memory. In addition, data transfer takes a lot of time.
In order to cope with this, there is proposed a method consisting in supervising the writing and reading out addresses to control the write and read out operations intermittently, as being a possibly effective method. In this case, the storage capacity required of the buffer memory may be reduced. However, there is necessitated for example a comparative operation for comparing the totality of the bits of the write and read out addresses, while there is also necessitated a control for frequently starting and stopping the write and read out operations. In short, it is not desirable to control the writing and reading out of the buffer memory by handling the totality of the address bits because the circuit configuration and control becomes complicated. This frequent start and stop control is particularly not desirable in the cases wherein the DAT is applied as the auxiliary storage in a computer system.